Kestrel Interface
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kest_fpga_encoding.c
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1#include <stdlib.h>
2#include <stdio.h>
3#include <math.h>
4
5static const char *FNAME = "kest_fpga_encoding.c";
6
7#include "kest_int.h"
8
9//#ifndef PRINTLINES_ALLOWED
10#define PRINTLINES_ALLOWED 1
11//#endif
12/*
13#ifdef PRINT_TRANSFER_BATCHES
14#ifdef PRINTLINES_ALLOWED
15#undef PRINTLINES_ALLOWED
16#endif
17#define PRINTLINES_ALLOWED 1
18#endif
19*/
20
22{
23 return (opcode == BLOCK_INSTR_LUT_READ
24 || opcode == BLOCK_INSTR_DELAY_READ
25 || opcode == BLOCK_INSTR_DELAY_WRITE
26 || opcode == BLOCK_INSTR_MEM_READ
27 || opcode == BLOCK_INSTR_MEM_WRITE
28 || opcode == BLOCK_INSTR_FILTER)
30}
31
33{
34 if (!block) return 0;
35
37}
38
40{
41 if (!block) return 0;
42
43 return place_bits( 5, 0, block->instr)
44 | place_bits( 9, 6, block->arg_a.addr) | ((!!(block->arg_a.type == KEST_ASM_ARG_EXPR)) << 10)
45 | place_bits(14, 11, block->arg_b.addr) | ((!!(block->arg_b.type == KEST_ASM_ARG_EXPR)) << 15)
46 | place_bits(19, 16, block->arg_c.addr) | ((!!(block->arg_c.type == KEST_ASM_ARG_EXPR)) << 20)
47 | place_bits(24, 21, block->dest)
48 | place_bits(29, 25, block->shift) | ((!!block->saturate_disable) << 30) | ((block->shift == 255) << 31);
49}
50
51uint32_t kest_encode_dsp_block_instr_type_b(kest_block *block, int res_handle)
52{
53 return place_bits(5, 0, block->instr) | (1 << 5)
54 | place_bits( 9, 6, block->arg_a.addr) | ((!!(block->arg_a.type == KEST_ASM_ARG_EXPR)) << 10)
55 | place_bits(14, 11, block->arg_b.addr) | ((!!(block->arg_b.type == KEST_ASM_ARG_EXPR)) << 15)
56 | place_bits(19, 16, block->dest)
57 | place_bits(31, 20, res_handle);
58}
59
61{
62 if (!block)
63 return 0;
64
65 int res_handle = 0;
66
67 if (kest_block_instr_format(block))
68 {
69 if (!block->res)
70 return 0;
71
72 switch (block->res->type)
73 {
75 res_handle = block->res->handle;
76 break;
77
79 res_handle = block->res->handle + (res ? res->memory : 0);
80 break;
81
83 res_handle = block->res->handle + (res ? res->delays : 0);
84 break;
85
87 res_handle = block->res->handle + (res ? res->filters : 0);
88 break;
89
90 }
91
92 return kest_encode_dsp_block_instr_type_b(block, res_handle);
93 }
94 else
95 {
97 }
98}
99
101{
102 if (KEST_FPGA_N_BLOCKS > 256)
103 return kest_fpga_batch_append_16(batch, block & 0xFFFF);
104 else
105 return kest_fpga_batch_append(batch, block & 0xFF);
106
107 return NO_ERROR;
108}
109
110
112{
113 if (!batch || !block)
114 return ERR_NULL_PTR;
115
116 uint32_t instr;
117
121
122 return NO_ERROR;
123}
124
126{
127 if (!batch || !block)
128 return ERR_NULL_PTR;
129
130 float v;
131 int16_t s;
132
133 if (block->reg_0.active && block->reg_0.expr)
134 {
135 v = kest_expression_evaluate(block->reg_0.expr, scope);
136 s = float_to_q_nminus1(v, block->reg_0.format);
137
141 }
142
143 if (block->reg_1.active && block->reg_1.expr)
144 {
145 v = kest_expression_evaluate(block->reg_1.expr, scope);
146 s = float_to_q_nminus1(v, block->reg_1.format);
147
151 }
152
153 return NO_ERROR;
154}
155
156
158{
159 if (!batch || !block)
160 return ERR_NULL_PTR;
161
162 float v;
164
165 if (block->reg_0.active)
166 {
167 if (block->reg_0.expr)
168 {
169 v = kest_expression_evaluate(block->reg_0.expr, scope);
170
171 s = float_to_q_nminus1(v, block->reg_0.format);
172
176 }
177 }
178
179 if (block->reg_1.active)
180 {
181 if (block->reg_1.expr)
182 {
183 v = kest_expression_evaluate(block->reg_1.expr, scope);
184
185 s = float_to_q_nminus1(v, block->reg_1.format);
186
190 }
191 }
192
193 return NO_ERROR;
194}
195
197{
198 if (!batch || !eff)
199 return ERR_NULL_PTR;
200
201 int i = 0;
202 kest_block_pll *current = eff->blocks;
203
204 while (current)
205 {
206 kest_fpga_batch_append_block_register_updates(batch, current->data, scope, pos + i);
207
208 current = current->next;
209 i++;
210 }
211
212 return NO_ERROR;
213}
214
216{
217 if (!batch || !block)
218 return ERR_NULL_PTR;
219
220 kest_fpga_batch_append_block_instr(batch, block, res, pos);
221 kest_fpga_batch_append_block_regs(batch, block, scope, pos);
222
223 return NO_ERROR;
224}
225
226int kest_fpga_batch_append_blocks(kest_fpga_transfer_batch *batch, kest_block_pll *blocks, const kest_eff_resource_report *res, kest_expr_scope *scope, int pos)
227{
228 if (!batch || !blocks)
229 return ERR_NULL_PTR;
230
231 kest_block_pll *current = blocks;
232
233 int i = 0;
234
235 int ret_val;
236 while (current)
237 {
238 if (current->data && (ret_val = kest_fpga_batch_append_block(batch, current->data, res, scope, pos + i)) != NO_ERROR)
239 return ret_val;
240
241 current = current->next;
242 i++;
243 }
244
245 return NO_ERROR;
246}
247
249{
250 if (!batch || !res || !rpt)
251 return ERR_NULL_PTR;
252
253 uint32_t size;
254 uint32_t delay;
255
256 int handle;
257 kest_filter *filter = (kest_filter*)res->data;
258 float c;
259 int32_t s;
260
261 switch (res->type)
262 {
265
266 delay = (uint32_t)(ceilf(kest_expression_evaluate(res->delay, scope)) * 0.001 * KEST_FPGA_SAMPLE_RATE);
267
268 if (res->size)
269 size = (uint32_t)(ceilf(kest_expression_evaluate(res->size, scope)) * 0.001 * KEST_FPGA_SAMPLE_RATE);
270 else
271 size = delay;
272
273 if (size < delay + 1)
274 size = delay + 1;
275
276 kest_fpga_batch_append_24(batch, size);
278
279 break;
281 if (!filter)
282 return ERR_BAD_ARGS;
283
285 kest_fpga_batch_append(batch, filter->format && 0xFF);
287 kest_fpga_batch_append_16(batch, filter->feed_back);
288
289 handle = res->handle + rpt->filters;
290
291 KEST_PRINTF("Sending filter coefficients; handle %d = %d + %d.\n", handle, res->handle, rpt->filters);
292 for (int i = 0; i < filter->coefs.count; i++)
293 {
295 kest_fpga_batch_append(batch, handle & 0xFF);
297 c = kest_expression_evaluate(filter->coefs.entries[i], scope);
298 KEST_PRINTF("Coefficient %d: %.06f\n", i, c);
299 s = float_to_q_nminus1_18bit(c, filter->format);
300 KEST_PRINTF("Converting to q%d.%d, we get %d. Masked to 18 bits, that's %d.\n",
301 1 + filter->format, KEST_FPGA_FILTER_WIDTH - 1 - filter->format, s, s & ((1u << 18) - 1));
302 kest_fpga_batch_append_24(batch, s & ((1u << 18) - 1));
303 }
304
305 break;
306 }
307
308 return NO_ERROR;
309}
310
312{
313 if (!batch || !list || !rpt)
314 return ERR_NULL_PTR;
315
316 kest_dsp_resource_pll *current = list;
317
318 while (current)
319 {
320 kest_fpga_batch_append_resource(batch, current->data, rpt, scope);
321 current = current->next;
322 }
323
324 return NO_ERROR;
325}
326
328{
329 if (!batch || !eff || !res)
330 return ERR_NULL_PTR;
331
332 kest_fpga_batch_append_resources(batch, eff->resources, res, scope);
333 kest_fpga_batch_append_blocks(batch, eff->blocks, res, scope, pos);
334
335 return NO_ERROR;
336}
337
339{
340 if (!batch || !effect || !res || !pos)
341 return ERR_NULL_PTR;
342
343 if (!effect->eff)
344 return ERR_BAD_ARGS;
345
346 kest_expr_scope *scope = effect->scope;
347
348 effect->block_position = *pos;
349 KEST_PRINTF("Updating effect %p's block position to %d. New value: %d\n", effect, *pos, effect->block_position);
350
351 kest_fpga_batch_append_eff_desc(batch, effect->eff, res, scope, *pos);
352
354
355 *pos += effect->eff->res_rpt.blocks;
356
357 return NO_ERROR;
358}
359
361{
362 if (!batch || !list || !res || !pos)
363 return ERR_NULL_PTR;
364 KEST_PRINTF("kest_fpga_batch_append_effects\n");
365
366 kest_effect_pll *current = list;
367
368 while (current)
369 {
370 kest_fpga_batch_append_effect(batch, current->data, res, pos);
371 current = current->next;
372 }
373
374 KEST_PRINTF("kest_fpga_batch_append_effects done\n");
375 return NO_ERROR;
376}
377
378char *kest_block_opcode_to_string(uint32_t opcode)
379{
380 switch (opcode)
381 {
382 case BLOCK_INSTR_NOP: return (char*)"BLOCK_INSTR_NOP";
383 case BLOCK_INSTR_LSH: return (char*)"BLOCK_INSTR_LSH";
384 case BLOCK_INSTR_RSH: return (char*)"BLOCK_INSTR_RSH";
385 case BLOCK_INSTR_ARSH: return (char*)"BLOCK_INSTR_ARSH";
386 case BLOCK_INSTR_MADD: return (char*)"BLOCK_INSTR_MADD";
387 case BLOCK_INSTR_ABS: return (char*)"BLOCK_INSTR_ABS";
388 case BLOCK_INSTR_LUT_READ: return (char*)"BLOCK_INSTR_LUT_READ";
389 case BLOCK_INSTR_DELAY_READ: return (char*)"BLOCK_INSTR_DELAY_READ";
390 case BLOCK_INSTR_DELAY_WRITE: return (char*)"BLOCK_INSTR_DELAY_WRITE";
391 case BLOCK_INSTR_MEM_WRITE: return (char*)"BLOCK_INSTR_MEM_WRITE";
392 case BLOCK_INSTR_FILTER: return (char*)"BLOCK_INSTR_FILTER";
393 case BLOCK_INSTR_MEM_READ: return (char*)"BLOCK_INSTR_MEM_READ";
394 case BLOCK_INSTR_MIN: return (char*)"BLOCK_INSTR_MIN";
395 case BLOCK_INSTR_MAX: return (char*)"BLOCK_INSTR_MAX";
396 case BLOCK_INSTR_CLAMP: return (char*)"BLOCK_INSTR_CLAMP";
397 case BLOCK_INSTR_MACZ: return (char*)"BLOCK_INSTR_MACZ";
398 case BLOCK_INSTR_MAC: return (char*)"BLOCK_INSTR_MAC";
399 case BLOCK_INSTR_MOV_ACC: return (char*)"BLOCK_INSTR_MOV_ACC";
400 case BLOCK_INSTR_MOV_UACC: return (char*)"BLOCK_INSTR_MOV_UACC";
401 case BLOCK_INSTR_MOV_LACC: return (char*)"BLOCK_INSTR_MOV_LACC";
402 }
403
404 return NULL;
405}
406
407char *kest_block_opcode_to_name(uint32_t opcode)
408{
409 switch (opcode)
410 {
411 case BLOCK_INSTR_NOP: return (char*)"nop";
412 case BLOCK_INSTR_LSH: return (char*)"lsh";
413 case BLOCK_INSTR_RSH: return (char*)"rsh";
414 case BLOCK_INSTR_ARSH: return (char*)"arsh";
415 case BLOCK_INSTR_MADD: return (char*)"madd";
416 case BLOCK_INSTR_ABS: return (char*)"abs";
417 case BLOCK_INSTR_LUT_READ: return (char*)"lut";
418 case BLOCK_INSTR_DELAY_READ: return (char*)"delay_read";
419 case BLOCK_INSTR_DELAY_WRITE: return (char*)"delay_write";
420 case BLOCK_INSTR_MEM_WRITE: return (char*)"mem_write";
421 case BLOCK_INSTR_MEM_READ: return (char*)"mem_read";
422 case BLOCK_INSTR_FILTER: return (char*)"filter";
423 case BLOCK_INSTR_MIN: return (char*)"min";
424 case BLOCK_INSTR_MAX: return (char*)"max";
425 case BLOCK_INSTR_CLAMP: return (char*)"clamp";
426 case BLOCK_INSTR_MACZ: return (char*)"macz";
427 case BLOCK_INSTR_MAC: return (char*)"mac";
428 case BLOCK_INSTR_MOV_ACC: return (char*)"mov_acc";
429 }
430
431 return "";
432}
433
434void print_instruction_format_a(uint32_t instr)
435{
436 int opcode = range_bits(instr, 5, 0);
437
438 int src_a = range_bits(instr, 4, 6);
439 int src_a_reg = !!(instr & (1 << 10));
440
441 int src_b = range_bits(instr, 4, 11);
442 int src_b_reg = !!(instr & (1 << 15));
443
444 int src_c = range_bits(instr, 4, 16);
445 int src_c_reg = !!(instr & (1 << 20));
446
447 int dest = range_bits(instr, 4, 21);
448 int shift = range_bits(instr, 5, 25);
449 int sat = !!(instr & (1 << 30));
450 int no_shift = !!(instr & (1 << 31));
451
452 KEST_PRINTF_("%s %s%d %s%d %s%d, c%d (%d%s)",
454 src_a_reg ? "r" : "c", src_a,
455 src_b_reg ? "r" : "c", src_b,
456 src_c_reg ? "r" : "c", src_c, dest,
457 shift, sat ? ", unsat" : "");
458}
459
460void print_instruction_format_b(uint32_t instr)
461{
462 int opcode = range_bits(instr, 5, 0);
463
464 int src_a = range_bits(instr, 4, 6);
465 int src_a_reg = !!(instr & (1 << 10));
466
467 int src_b = range_bits(instr, 4, 11);
468 int src_b_reg = !!(instr & (1 << 15));
469
470 int no_shift = 0;
471
472 int src_c = 0;
473 int src_c_reg = 0;
474
475 int dest = range_bits(instr, 4, 16);
476
477 int res_addr = range_bits(instr, 8, 20);
478
479 KEST_PRINTF_("%s %s%d %s%d $%d c%d",
481 src_a_reg ? "r" : "c", src_a,
482 src_b_reg ? "r" : "c", src_b,
483 res_addr, dest);
484}
485
486void print_instruction(uint32_t instr)
487{
488 int format = !!(instr & (1 << 5));
489
490 if (format)
492 else
494}
495
497{
498 int n = seq.len;
499
500 KEST_PRINTF_("Reading out FPGA transfer batch %p (length %d)\n", seq.buf, n);
501
502 if (!seq.buf)
503 {
504 KEST_PRINTF_("Buffer is NULL!\n");
505 }
506
507 if (n < 1)
508 {
509 KEST_PRINTF_("Batch has no bytes!\n");
510 }
511
512 int i = 0;
513
514 int state = 0;
515 int ret_state;
516 int skip = 0;
517
518 int shift = 0;
519
520 uint8_t byte;
521
522 int ctr = 0;
523 int ctr_2 = 0;
524
525 uint8_t reg_no = 0;
526 kest_fpga_block_addr_t block = 0;
527 uint32_t value = 0;
528 int32_t signed_val;
529 uint32_t instruction = 0;
530
531 while (i < n)
532 {
533 byte = seq.buf[i];
534
535 KEST_PRINTF_("\tByte %s%d: 0x%02X. ", (n > 9 && i < 10) ? " " : "", i, byte);
536
537 switch (state)
538 {
539 case 0: // expecting a command
540 switch (byte)
541 {
543 KEST_PRINTF_("Command BEGIN_PROGRAM");
544 break;
545
547 KEST_PRINTF_("Command WRITE_BLOCK_INSTR");
548 state = 1;
549 ret_state = 2;
550 ctr = 0;
551 instruction = 0;
552 break;
553
555 KEST_PRINTF_("Command WRITE_BLOCK_REG_0");
556 state = 1;
557 ret_state = 4;
558 value = 0;
559 ctr = 0;
560 break;
561
563 KEST_PRINTF_("Command WRITE_BLOCK_REG_1");
564 state = 1;
565 ret_state = 4;
566 value = 0;
567 ctr = 0;
568 break;
569
571 KEST_PRINTF_("Command ALLOC_DELAY");
572 state = 5;
573 value = 0;
574 ctr = 0;
575 ctr_2 = 0;
576 shift = 15;
577 break;
578
580 KEST_PRINTF_("Command END_PROGRAM");
581 break;
582
584 KEST_PRINTF_("Command UPDATE_BLOCK_REG_0");
585 state = 1;
586 ret_state = 4;
587 value = 0;
588 ctr = 0;
589 break;
590
592 KEST_PRINTF_("Command UPDATE_BLOCK_REG_1");
593 state = 1;
594 ret_state = 4;
595 value = 0;
596 ctr = 0;
597 break;
598
600 KEST_PRINTF_("Command COMMIT_REG_UPDATES");
601 break;
602
604 KEST_PRINTF_("Command SET_INPUT_GAIN");
605 state = 4;
606 ret_state = 0;
607 value = 0;
608 ctr = 0;
609 shift = 4;
610 break;
611
613 KEST_PRINTF_("Command SET_OUTPUT_GAIN");
614 state = 4;
615 ret_state = 0;
616 value = 0;
617 ctr = 0;
618 shift = 4;
619 break;
620
622 KEST_PRINTF_("Command COMMAND_ALLOC_FILTER");
623 state = 6;
624 ret_state = 0;
625 value = 0;
626 ctr = 0;
627 ctr_2 = 0;
628 shift = 0;
629 break;
630
632 KEST_PRINTF_("Command COMMAND_WRITE_FILTER_COEF");
633 state = 7;
634 ret_state = 0;
635 value = 0;
636 ctr = 0;
637 ctr_2 = 0;
638 shift = 0;
639 break;
640
641 }
642 break;
643
644 case 1: // expecting block number
645 block = (block << 8) | byte;
646
647 if (ctr == KEST_FPGA_BLOCK_ADDR_BYTES - 1)
648 {
649 KEST_PRINTF_("Block number %d", byte);
650 state = ret_state;
651 ctr = 0;
652 }
653 else
654 {
655 ctr++;
656 }
657
658 break;
659
660 case 2: // expecting instruction
661 if (ctr == 3)
662 {
663 state = 0;
664 instruction = (instruction << 8) | byte;
665 //kest_printf("Word: %s; ", binary_print_32(instruction));
666 print_instruction(instruction);
667 if (kest_fpga_block_opcode_format(instruction & IBM(5)))
668 shift = 0;
669 else
670 shift = range_bits(instruction, 5, 25);
671 }
672 else
673 {
674 instruction = (instruction << 8) | byte;
675 ctr++;
676 }
677 break;
678
679 case 3: // expecting register number then register value
680 KEST_PRINTF_("Register %d", byte);
681 state = 4;
682 break;
683
684 case 4: // expecting a value
685 if (ctr == KEST_FPGA_DATA_BYTES - 1)
686 {
687 state = 0;
688
689 value = (value << 8) | byte;
690 KEST_PRINTF_("Value: %s = %d = %f (in q%d.%d)", binary_print_16(value), value, (float)value / (powf(2.0, 15 - shift)), 1 + shift, 15 - shift);
691 }
692 else
693 {
694 value = (value << 8) | byte;
695 ctr++;
696 }
697 break;
698
699 case 5: // expecting two 24-bit values. lol!
700 if (ctr == 0)
701 {
702 value = byte;
703 ctr++;
704 }
705 else if (ctr == 2)
706 {
707 value = (value << 8) | byte;
708 KEST_PRINTF_("%s: %s = 0x%06x = %.02f", ctr_2 ? "Delay" : "Size", binary_print_24(value), value, (float)((uint32_t)value) / (powf(2.0, (15 - shift))));
709
710 ctr = 0;
711
712 if (ctr_2 == 1)
713 {
714 state = 0;
715 }
716 else
717 {
718 shift = 7;
719 ctr_2 = 1;
720 }
721 }
722 else
723 {
724 value = (value << 8) | byte;
725 ctr++;
726 }
727 break;
728
729 case 6:
730 if (ctr_2 == 0)
731 {
732 KEST_PRINTF_("Format: q%d.%d", 1 + byte, 17 - byte);
733 shift = byte;
734 ctr_2++;
735 }
736 else if (ctr_2 == 1)
737 {
738 if (ctr == 0)
739 {
740 value = byte;
741 ctr++;
742 }
743 else
744 {
745 value = (value << 8) | byte;
746 KEST_PRINTF_("Feed-forward: %d", value);
747
748 ctr_2++;
749 ctr = 0;
750 }
751 }
752 else
753 {
754 if (ctr == 0)
755 {
756 value = byte;
757 ctr++;
758 }
759 else
760 {
761 value = (value << 8) | byte;
762 KEST_PRINTF_("Feed-back: %d", value);
763
764 state = 0;
765 }
766 }
767
768 break;
769
770 case 7:
771 if (ctr_2 == 0)
772 {
773 KEST_PRINTF_("Filter %d", byte);
774 ctr_2++;
775 ctr = 0;
776 value = 0;
777 }
778 else if (ctr_2 == 1)
779 {
780 value = (value << 8) | byte;
781
782 if (ctr == 1)
783 {
784 KEST_PRINTF_("Coefficient %d", value);
785 ctr = 0;
786 ctr_2++;
787
788 signed_val = 0;
789 }
790 else
791 {
792 ctr++;
793 }
794 }
795 else
796 {
797 signed_val = (signed_val << 8) | byte;
798 ctr++;
799
800 if (ctr == 3)
801 {
802 if (signed_val & (1u << 23))
803 {
804 signed_val |= 0xFF000000;
805 }
806
807 KEST_PRINTF_("Value: %.04f", ((float)signed_val) * pow(2, -(16 - shift)));
808 state = 0;
809 }
810 }
811 break;
812
813 default:
814 KEST_PRINTF_("Unknown :(\n");
815 return 1;
816 }
817
818 KEST_PRINTF_("\n");
819
820 i++;
821 }
822
823 return 0;
824}
#define KEST_ASM_ARG_EXPR
#define BLOCK_INSTR_MEM_WRITE
Definition kest_block.h:24
#define BLOCK_INSTR_MAC
Definition kest_block.h:18
#define BLOCK_INSTR_DELAY_WRITE
Definition kest_block.h:22
#define BLOCK_INSTR_DELAY_READ
Definition kest_block.h:21
#define BLOCK_INSTR_MOV_ACC
Definition kest_block.h:13
#define BLOCK_INSTR_CLAMP
Definition kest_block.h:12
#define BLOCK_INSTR_MOV_UACC
Definition kest_block.h:15
#define BLOCK_INSTR_RSH
Definition kest_block.h:8
#define BLOCK_INSTR_FILTER
Definition kest_block.h:25
#define BLOCK_INSTR_MACZ
Definition kest_block.h:16
#define BLOCK_INSTR_MEM_READ
Definition kest_block.h:23
#define BLOCK_INSTR_MADD
Definition kest_block.h:5
#define BLOCK_INSTR_ABS
Definition kest_block.h:9
#define BLOCK_INSTR_MOV_LACC
Definition kest_block.h:14
#define BLOCK_INSTR_LSH
Definition kest_block.h:7
#define BLOCK_INSTR_MAX
Definition kest_block.h:11
#define BLOCK_INSTR_MIN
Definition kest_block.h:10
#define BLOCK_INSTR_LUT_READ
Definition kest_block.h:20
#define BLOCK_INSTR_ARSH
Definition kest_block.h:6
#define BLOCK_INSTR_NOP
Definition kest_block.h:4
#define ERR_BAD_ARGS
#define NO_ERROR
#define ERR_NULL_PTR
float kest_expression_evaluate(kest_expression *expr, kest_expr_scope *scope)
kest_fpga_sample_t float_to_q_nminus1(float x, int shift)
int32_t float_to_q_nminus1_18bit(float x, int shift)
char * kest_block_opcode_to_name(uint32_t opcode)
int kest_fpga_batch_append_block_regs(kest_fpga_transfer_batch *batch, kest_block *block, kest_expr_scope *scope, int pos)
char * kest_block_opcode_to_string(uint32_t opcode)
int kest_fpga_batch_append_eff_desc(kest_fpga_transfer_batch *batch, kest_effect_desc *eff, const kest_eff_resource_report *res, kest_expr_scope *scope, int pos)
int kest_fpga_batch_append_effect(kest_fpga_transfer_batch *batch, kest_effect *effect, kest_eff_resource_report *res, int *pos)
int kest_fpga_batch_append_blocks(kest_fpga_transfer_batch *batch, kest_block_pll *blocks, const kest_eff_resource_report *res, kest_expr_scope *scope, int pos)
int kest_fpga_batch_append_block_instr(kest_fpga_transfer_batch *batch, kest_block *block, const kest_eff_resource_report *res, int pos)
int kest_fpga_batch_append_block_register_updates(kest_fpga_transfer_batch *batch, kest_block *block, kest_expr_scope *scope, int pos)
uint32_t kest_block_instr_encode_resource_aware(kest_block *block, const kest_eff_resource_report *res)
int kest_fpga_transfer_batch_append_effect_register_updates(kest_fpga_transfer_batch *batch, kest_effect_desc *eff, kest_expr_scope *scope, int pos)
int kest_fpga_batch_append_resource(kest_fpga_transfer_batch *batch, kest_dsp_resource *res, const kest_eff_resource_report *rpt, kest_expr_scope *scope)
void print_instruction_format_b(uint32_t instr)
int kest_fpga_batch_append_block(kest_fpga_transfer_batch *batch, kest_block *block, const kest_eff_resource_report *res, kest_expr_scope *scope, int pos)
void print_instruction_format_a(uint32_t instr)
int kest_fpga_block_opcode_format(int opcode)
int kest_fpga_batch_print(kest_fpga_transfer_batch seq)
int kest_block_instr_format(kest_block *block)
int kest_fpga_batch_append_block_number(kest_fpga_transfer_batch *batch, int block)
void print_instruction(uint32_t instr)
uint32_t kest_encode_dsp_block_instr_type_a(kest_block *block)
int kest_fpga_batch_append_effects(kest_fpga_transfer_batch *batch, kest_effect_pll *list, kest_eff_resource_report *res, int *pos)
int kest_fpga_batch_append_resources(kest_fpga_transfer_batch *batch, kest_dsp_resource_pll *list, const kest_eff_resource_report *rpt, kest_expr_scope *scope)
uint32_t kest_encode_dsp_block_instr_type_b(kest_block *block, int res_handle)
#define INSTR_FORMAT_B
#define INSTR_FORMAT_A
#define DELAY_FORMAT
int kest_fpga_batch_append_16(kest_fpga_transfer_batch *seq, uint16_t x)
int kest_fpga_batch_append(kest_fpga_transfer_batch *seq, uint8_t x)
int kest_fpga_batch_append_24(kest_fpga_transfer_batch *seq, uint32_t x)
int kest_fpga_batch_append_32(kest_fpga_transfer_batch *seq, uint32_t x)
#define COMMAND_UPDATE_BLOCK_REG_0
#define COMMAND_SET_OUTPUT_GAIN
#define COMMAND_WRITE_BLOCK_REG_0
uint8_t kest_fpga_block_addr_t
#define KEST_FPGA_SAMPLE_RATE
Definition kest_fpga_io.h:4
#define COMMAND_BEGIN_PROGRAM
Definition kest_fpga_io.h:8
#define COMMAND_ALLOC_DELAY
#define KEST_FPGA_N_BLOCKS
#define COMMAND_WRITE_FILTER_COEF
#define COMMAND_WRITE_BLOCK_REG_1
#define COMMAND_ALLOC_FILTER
#define KEST_FPGA_BLOCK_ADDR_BYTES
#define KEST_FPGA_FILTER_WIDTH
#define COMMAND_SET_INPUT_GAIN
#define COMMAND_WRITE_BLOCK_INSTR
Definition kest_fpga_io.h:9
#define KEST_FPGA_DATA_BYTES
#define COMMAND_COMMIT_REG_UPDATES
int16_t kest_fpga_sample_t
#define COMMAND_UPDATE_BLOCK_REG_1
#define COMMAND_END_PROGRAM
char * binary_print_16(uint16_t x)
Definition kest_hfunc.c:30
char * binary_print_24(uint32_t x)
Definition kest_hfunc.c:37
#define range_bits(x, n, start)
Definition kest_hfunc.h:22
#define place_bits(x, y, val)
Definition kest_hfunc.h:24
#define IBM(x)
Definition kest_hfunc.h:20
#define KEST_PRINTF_(...)
Definition kest_printf.h:11
#define KEST_PRINTF(...)
Definition kest_printf.h:10
int kest_resource_report_integrate(kest_eff_resource_report *a, const kest_eff_resource_report *b)
#define KEST_DSP_RESOURCE_MEM
#define KEST_DSP_RESOURCE_FILTER
#define KEST_DSP_RESOURCE_DELAY
#define KEST_DSP_RESOURCE_LUT
kest_expression * expr
Definition kest_block.h:49
kest_block_operand arg_b
Definition kest_block.h:56
kest_block_operand arg_c
Definition kest_block.h:57
kest_block_reg_val reg_0
Definition kest_block.h:61
kest_block_reg_val reg_1
Definition kest_block.h:62
kest_block_operand arg_a
Definition kest_block.h:55
int saturate_disable
Definition kest_block.h:66
kest_dsp_resource * res
Definition kest_block.h:68
struct kest_expression * size
struct kest_expression * delay
kest_block_pll * blocks
kest_dsp_resource_pll * resources
kest_eff_resource_report res_rpt
kest_expr_scope * scope
Definition kest_effect.h:44
int block_position
Definition kest_effect.h:32
kest_effect_desc * eff
Definition kest_effect.h:43
struct kest_expression_ptr_list coefs